The HEXTE microprocessor concept is based upon a radiation hardened 80C86 microprocessor. The processor is operated at 4 MHz to provide 20% derating factor on all timing requirements. The processor provides several functions, including: (1) coordination of data flow through the cluster, (2) storage and manipulation of science data, (3) control of instrument operation, (4) monitoring and reporting of overall system health, (5) control and monitoring of cluster aperture modulation and heaters, and (6) communication with the other cluster to maintain synchronization of modulation and telemetry.
The cluster memory is made up of both RAM and PROM. Address decoding allows memory access from either the microprocessor or the DMA controller. The PROM contains the operating software and preprogrammed tables and constants. The program allows the HEXTE instrument to operate autonomously at power up. Estimates for the major software modules total 30 kbytes, with 50% reserved for growth (15 kbytes). To reduce overall power consumption, the program will be transferred to RAM after completing power-on checks. The PROMs will then be kept in a standby mode, consuming 13 mW for the entire 48 K memory. The RAM will be 192 kbytes of CMOS memory, radiation hardened, and single event upset resistant, with low operating power both in normal and standby modes.
Since each valid phoswich event generates a 48-bit word containing energy, time, pulse shape, and flags, this data must be stored in memory for subsequent processing and telemetry. The single memory and DMA transfer provide for use of only 1% of the processor's time at 1600 events/s and contributes less than 1% deadtime. All event data are routed into RAM through a single DMA channel. This is a 6-byte, 8 bits at a time, transfer in order to utilize the same interface controllers, such as on me serial communications port.